Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
193
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
12.6.11.9SEV
Send Event.
Syntax
SEV{cond}
where:
condis an optional condition code, see 
.
Operation
SEV is a hint instruction that causes an event to be signaled to all processors within a multiprocessor system. It 
also sets the local event register to 1, se
.
Condition Flags
This instruction does not change the flags.
Examples
SEV ; Send Event 
12.6.11.10SVC
Supervisor Call.
Syntax
SVC{cond} #imm
where:
condis an optional condition code, see 
.
immis an expression evaluating to an integer in the range 0-255 (8-bit value).
Operation
The SVC instruction causes the SVC exception.
imm
 is ignored by the processor. If required, it can be retrieved by the exception handler to determine what service 
is being requested.
Condition Flags
This instruction does not change the flags.
Examples
SVC
0x32
; Supervisor Call (SVC handler can extract the immediate value
; by locating it via the stacked PC)