Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

216

SCB_SCR

 Read

/Write

 0x00

0000000

0: Only enabled interrupts or events can wake up the processor; disabled interrupts are excluded.
1: Enabled events and all interrupts, including disabled interrupts, can wake up the processor.
When an event or an interrupt enters the pending state, the event signal wakes up the processor from WFE. If the proces-

sor is not waiting for an event, the event is registered and affects the next WFE. 
The processor also wakes up on execution of an SEV instruction or an external event.

Controls whether the processor uses sleep or deep sleep as its low power mode:
0: Sleep.
1: Deep sleep.

Indicates sleep-on-exit when returning from the Handler mode to the Thread mode:
0: Do not sleep when returning to Thread mode.
1: Enter sleep, or deep sleep, on return from an ISR. 
Setting this bit to 1 enables an interrupt-driven application to avoid returning to an empty main application.

31

30

29

28

27

26

25

24

–

23

22

21

20

19

18

17

16

–

15

14

13

12

11

10

9

8

–

7

6

5

4

3

2

1

0

–

SEVONPEND

–

SLEEPDEEP SLEEPONEXIT

–