Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
219
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
12.9.1.8 System Handler Priority Registers
The SCB_SHPR1–SCB_SHPR3 registers set the priority level, 0 to 15 of the exception handlers that have configurable pri-
ority. They are byte-accessible.
The system fault handlers and the priority field and register for each handler are:
The system fault handlers and the priority field and register for each handler are:
Each PRI_N field is 8 bits wide, but the processor implements only bits [7:4] of each field, and bits [3:0] read as zero and
ignore writes.
Table 12-33.
System Fault Handler Priority Fields
Handler
Field
Register Description
Memory management fault (MemManage)
PRI_4
Bus fault (BusFault)
PRI_5
Usage fault (UsageFault)
PRI_6
SVCall
PRI_11
PendSV
PRI_14
SysTick
PRI_15