Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
225
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
The user can write to this register to change the pending or active status of system exceptions. An OS kernel can write to
the active bits to perform a context switch that changes the current exception type.
12.9.1.13Configurable Fault Status Register
Name:
SCB_CFSR
Access:
Read
/Write
Reset:
0x00
0000000
• IACCVIOL: Instruction Access Violation Flag
This is part of
.
0: No instruction access violation fault.
1: The processor attempted an instruction fetch from a location that does not permit execution.
This fault occurs on any access to an XN region, even when the MPU is disabled or not present.
When this bit is 1, the PC value stacked for the exception return points to the faulting instruction. The processor has not
1: The processor attempted an instruction fetch from a location that does not permit execution.
This fault occurs on any access to an XN region, even when the MPU is disabled or not present.
When this bit is 1, the PC value stacked for the exception return points to the faulting instruction. The processor has not
written a fault address to the SCB_MMFAR.
• DACCVIOL: Data Access Violation Flag
This is part of
.
0: No data access violation fault.
1: The processor attempted a load or store at a location that does not permit the operation.
When this bit is 1, the PC value stacked for the exception return points to the faulting instruction. The processor has loaded
1: The processor attempted a load or store at a location that does not permit the operation.
When this bit is 1, the PC value stacked for the exception return points to the faulting instruction. The processor has loaded
the SCB_MMFAR with the address of the attempted access.
• MUNSTKERR: Memory Manager Fault on Unstacking for a Return From Exception
This is part of
.
0: No unstacking fault.
1: Unstack for an exception return has caused one or more access violations.
This fault is chained to the handler. This means that when this bit is 1, the original return stack is still present. The proces-
1: Unstack for an exception return has caused one or more access violations.
This fault is chained to the handler. This means that when this bit is 1, the original return stack is still present. The proces-
sor has not adjusted the SP from the failing return, and has not performed a new save. The processor has not written a
fault address to the SCB_MMFAR.
• MSTKERR: Memory Manager Fault on Stacking for Exception Entry
This is part of
.
0: No stacking fault.
1: Stacking for an exception entry has caused one or more access violations.
1: Stacking for an exception entry has caused one or more access violations.
31
30
29
28
27
26
25
24
–
DIVBYZERO
UNALIGNED
23
22
21
20
19
18
17
16
–
NOCP
INVPC
INVSTATE
UNDEFINSTR
15
14
13
12
11
10
9
8
BFARVALID
–
STKERR
UNSTKERR IMPRECISERR PRECISERR
IBUSERR
7
6
5
4
3
2
1
0
MMARVALID
–
MLSPERR
MSTKERR
MUNSTKERR
–
DACCVIOL
IACCVIOL