Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

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ORR R2, #1

; Enable

STRH R2, [R0, #0x8]

; Region Size and Enable

The software must use memory barrier instructions:



Before the MPU setup, if there might be outstanding memory transfers, such as buffered writes, that might 

be affected by the change in MPU settings



After the MPU setup, if it includes memory transfers that must use the new MPU settings.

However, memory barrier instructions are not required if the MPU setup process starts by entering an exception 

handler, or is followed by an exception return, because the exception entry and exception return mechanisms 

cause memory barrier behavior.
The software does not need any memory barrier instructions during an MPU setup, because it accesses the MPU 

through the PPB, which is a Strongly-Ordered memory region.
For example, if the user wants all of the memory access behavior to take effect immediately after the programming 

sequence, a DSB instruction and an ISB instruction must be used. A DSB is required after changing MPU settings, 

such as at the end of a context switch. An ISB is required if the code that programs the MPU region or regions is 

entered using a branch or call. If the programming sequence is entered using a return from exception, or by taking 

an exception, then an ISB is not required.

The user can program directly using multi-word writes, depending on how the information is divided. Consider the 

following reprogramming:

; R1 = region number

; R2 = address

; R3 = size, attributes in one

LDR R0, =MPU_RNR

; 0xE000ED98, MPU region number register

STR R1, [R0, #0x0]

; Region Number

STR R2, [R0, #0x4]

; Region Base Address

STR R3, [R0, #0x8]

; Region Attribute, Size and Enable

Use an STM instruction to optimize this:

; R1 = region number

; R2 = address

; R3 = size, attributes in one

LDR R0, =MPU_RNR

; 0xE000ED98, MPU region number register

STM R0, {R1-R3}

; Region Number, address, attribute, size and enable

This can be done in two words for pre-packed information. This means that the MPU_RBAR contains the required 

region number and had the VALID bit set to 1. See 

. Use this when the data 

is statically packed, for example in a boot loader:

; R1 = address and region number in one

; R2 = size and attributes in one

LDR R0, =MPU_RBAR

; 0xE000ED9C, MPU Region Base register

STR R1, [R0, #0x0]

; Region base address and 

; region number combined with VALID (bit 4) set to 1

STR R2, [R0, #0x4]

; Region Attribute, Size and Enable

Use an STM instruction to optimize this: