Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

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When ENABLE and PRIVDEFENA are both set to 1:

• For privileged accesses, the default memory map is as described in 

. Any access by privileged 

software that does not address an enabled memory region behaves as defined by the default memory map.

• Any access by unprivileged software that does not address an enabled memory region causes a memory management 

fault. 

XN and Strongly-ordered rules always apply to the System Control Space regardless of the value of the ENABLE bit. 
When the ENABLE bit is set to 1, at least one region of the memory map must be enabled for the system to function unless 

the PRIVDEFENA bit is set to 1. If the PRIVDEFENA bit is set to 1 and no regions are enabled, then only privileged soft-

ware can operate.
When the ENABLE bit is set to 0, the system uses the default memory map. This has the same memory attributes as if the 

MPU is not implemented. The default memory map applies to accesses from both privileged and unprivileged software.
When the MPU is enabled, accesses to the System Control Space and vector table are always permitted. Other areas are 

accessible based on regions and whether PRIVDEFENA is set to 1.
Unless HFNMIENA is set to 1, the MPU is not enabled when the processor is executing the handler for an exception with 

priority –1 or –2. These priorities are only possible when handling a hard fault or NMI exception, or when FAULTMASK is 

enabled. Setting the HFNMIENA bit to 1 enables the MPU when operating with these two priorities.