Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
391
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
22.5.6 Cache Controller Maintenance Register 1
Name:
CMCC_MAINT1
Address:
0x4007C024
Access:
 Write-
only
• INDEX: Invalidate Index
This field indicates the cache line that is being invalidated. 
The size of the INDEX field depends on the cache size:
– for 2 Kbytes: 5 bits
– for 4 Kbytes: 6 bits
– for 8 Kbytes: 7 bits, and so on
• WAY: Invalidate Way
31
30
29
28
27
26
25
24
WAY
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
INDEX
7
6
5
4
3
2
1
0
INDEX
Value
Name
Description
0
WAY0
Way 0 is selection for index invalidation
1
WAY1
Way 1 is selection for index invalidation
2
WAY2
Way 2 is selection for index invalidation
3
WAY3
Way 3 is selection for index invalidation