Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
473
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
26.15.1 SMC Setup Register
Name:
SMC_SETUP[0..3]
Address:
0x400E0000 [0], 0x400E0010 [1], 0x400E0020 [2], 0x400E0030 [3]
Access:
Read-write
• NWE_SETUP: NWE Setup Length
The NWE signal setup length is defined as:
NWE setup length = (128* NWE_SETUP[5] + NWE_SETUP[4:0]) clock cycles
NWE setup length = (128* NWE_SETUP[5] + NWE_SETUP[4:0]) clock cycles
• NCS_WR_SETUP: NCS Setup Length in WRITE Access
In write access, the NCS signal setup length is defined as:
NCS setup length = (128* NCS_WR_SETUP[5] + NCS_WR_SETUP[4:0]) clock cycles
NCS setup length = (128* NCS_WR_SETUP[5] + NCS_WR_SETUP[4:0]) clock cycles
• NRD_SETUP: NRD Setup Length
The NRD signal setup length is defined in clock cycles as:
NRD setup length = (128* NRD_SETUP[5] + NRD_SETUP[4:0]) clock cycles
NRD setup length = (128* NRD_SETUP[5] + NRD_SETUP[4:0]) clock cycles
• NCS_RD_SETUP: NCS Setup Length in READ Access
In read access, the NCS signal setup length is defined as:
NCS setup length = (128* NCS_RD_SETUP[5] + NCS_RD_SETUP[4:0]) clock cycles
NCS setup length = (128* NCS_RD_SETUP[5] + NCS_RD_SETUP[4:0]) clock cycles
31
30
29
28
27
26
25
24
–
–
NCS_RD_SETUP
23
22
21
20
19
18
17
16
–
–
NRD_SETUP
15
14
13
12
11
10
9
8
–
–
NCS_WR_SETUP
7
6
5
4
3
2
1
0
–
–
NWE_SETUP