Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
596
31.7.26 PIO Input Filter Slow Clock Disable Register
Name:
PIO_IFSCDR
Address:
0x400E0E80 (PIOA), 0x400E1080 (PIOB), 0x400E1280 (PIOC)
Access:
Write-only
• P0-P31: PIO Clock Glitch Filtering Select
0: No effect.
1: The glitch filter is able to filter glitches with a duration < Tmck/2.
1: The glitch filter is able to filter glitches with a duration < Tmck/2.
31.7.27 PIO Input Filter Slow Clock Enable Register
Name:
PIO_IFSCER
Address:
0x400E0E84 (PIOA), 0x400E1084 (PIOB), 0x400E1284 (PIOC)
Access:
Write-only
• P0-P31: Debouncing Filtering Select
0: No effect.
1: The debouncing filter is able to filter pulses with a duration < Tdiv_slclk/2.
1: The debouncing filter is able to filter pulses with a duration < Tdiv_slclk/2.
31
30
29
28
27
26
25
24
P31
P30
P29
P28
P27
P26
P25
P24
23
22
21
20
19
18
17
16
P23
P22
P21
P20
P19
P18
P17
P16
15
14
13
12
11
10
9
8
P15
P14
P13
P12
P11
P10
P9
P8
7
6
5
4
3
2
1
0
P7
P6
P5
P4
P3
P2
P1
P0
31
30
29
28
27
26
25
24
P31
P30
P29
P28
P27
P26
P25
P24
23
22
21
20
19
18
17
16
P23
P22
P21
P20
P19
P18
P17
P16
15
14
13
12
11
10
9
8
P15
P14
P13
P12
P11
P10
P9
P8
7
6
5
4
3
2
1
0
P7
P6
P5
P4
P3
P2
P1
P0