Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

631

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

Note:

1. STTDLY is set to 0.

The receiver can be programmed to receive transmissions from the transmitter. This is done by setting the Loop 

Mode (LOOP) bit in SSC_RFMR. In this case, RD is connected to TD, RF is connected to TF and RK is connected 

to TK.

Most bits in SSC_SR have a corresponding bit in interrupt management registers.
The SSC can be programmed to generate an interrupt when it detects an event. The interrupt is controlled by 

writing SSC_IER (Interrupt Enable Register) and SSC_IDR (Interrupt Disable Register) These registers enable 

and disable, respectively, the corresponding interrupt by setting and clearing the corresponding bit in SSC_IMR 

(Interrupt Mask Register), which controls the generation of interrupts by asserting the SSC interrupt line connected 

to the interrupt controller.

Data

DATLEN

 

Data

DATLEN

 

Start = Enable Receiver

To SSC_RHR

To SSC_RHR

RD

SSC_IMR

PDC

Interrupt 

Control

SSC Interrupt

Set

RXRDY

OVRUN

RXSYNC

Receiver

Transmitter

TXRDY

TXEMPTY

TXSYNC

TXBUFE

ENDTX

RXBUFF

ENDRX

Clear

SSC_IER

SSC_IDR