Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
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637
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
32.9.2 SSC Clock Mode Register
Name:
SSC_CMR
Address:
0x40004004
Access:
Read-write 
This register can only be written if the WPEN bit is cleared in 
• DIV: Clock Divider
0 = The Clock Divider is not active.
Any Other Value: The Divided Clock equals the Master Clock divided by 2 times DIV. The maximum bit rate is MCK/2. The 
minimum bit rate is MCK/2 x 4095 = MCK/8190.
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DIV
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0
DIV