Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

652

SSC_SR

0x40004040

Read-only 

0 = Data has been loaded in SSC_THR and is waiting to be loaded in the Transmit Shift Register (TSR).
1 = SSC_THR is empty.

0 = Data remains in SSC_THR or is currently transmitted from TSR.
1 = Last data written in SSC_THR has been loaded in TSR and last data loaded in TSR has been transmitted.

0 = The register SSC_TCR has not reached 0 since the last write in SSC_TCR or SSC_TNCR.
1 = The register SSC_TCR has reached 0 since the last write in SSC_TCR or SSC_TNCR.

0 = SSC_TCR or SSC_TNCR have a value other than 0.
1 = Both SSC_TCR and SSC_TNCR have a value of 0.

0 = SSC_RHR is empty.
1 = Data has been received and loaded in SSC_RHR.

0 = No data has been loaded in SSC_RHR while previous data has not been read since the last read of the Status 

Register.
1 = Data has been loaded in SSC_RHR while previous data has not yet been read since the last read of the Status 

Register.

0 = Data is written on the Receive Counter Register or Receive Next Counter Register.
1 = End of PDC transfer when Receive Counter Register has arrived at zero.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

RXEN

TXEN

15

14

13

12

11

10

9

8

–

–

–

–

RXSYN

TXSYN

CP1

CP0

7

6

5

4

3

2

1

0

RXBUFF

ENDRX

OVRUN

RXRDY

TXBUFE

ENDTX

TXEMPTY

TXRDY