Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
810
36.8.9 USART Interrupt Mask Register
Name:
US_IMR
Address:
0x40024010 (0), 0x40028010 (1)
Access:
Read-only
For SPI specific configuration, see “USART Interrupt Mask Register (SPI_MODE)” on page 812.
The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is not enabled.
1: The corresponding interrupt is enabled.
The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is not enabled.
1: The corresponding interrupt is enabled.
• RXRDY: RXRDY Interrupt Mask
• TXRDY: TXRDY Interrupt Mask
• RXBRK: Receiver Break Interrupt Mask
• ENDRX: End of Receive Transfer Interrupt Mask (available in all USART modes of operation)
• ENDTX: End of Transmit Interrupt Mask (available in all USART modes of operation)
• OVRE: Overrun Error Interrupt Mask
• FRAME: Framing Error Interrupt Mask
• PARE: Parity Error Interrupt Mask
• TIMEOUT: Time-out Interrupt Mask
• TXEMPTY: TXEMPTY Interrupt Mask
• ITER: Max Number of Repetitions Reached Interrupt Mask
• TXBUFE: Buffer Empty Interrupt Mask (available in all USART modes of operation)
• RXBUFF: Buffer Full Interrupt Mask (available in all USART modes of operation)
• NACK: Non AcknowledgeInterrupt Mask
• RIIC: Ring Indicator Input Change Mask
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
MANE
23
22
21
20
19
18
17
16
–
–
–
–
CTSIC
DCDIC
DSRIC
RIIC
15
14
13
12
11
10
9
8
–
–
NACK
RXBUFF
TXBUFE
ITER
TXEMPTY
TIMEOUT
7
6
5
4
3
2
1
0
PARE
FRAME
OVRE
ENDTX
ENDRX
RXBRK
TXRDY
RXRDY