Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
855
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
37.7.3 TC Channel Mode Register: Waveform Mode
Name:
TC_CMRx [x=0..2] (WAVE = 1)
Access:
Read/Write 
This register can only be written if the WPEN bit is cleared in th
• TCCLKS: Clock Selection
• CLKI: Clock Invert 
0: Counter is incremented on rising edge of the clock.
1: Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• CPCSTOP: Counter Clock Stopped with RC Compare
0: Counter clock is not stopped when counter reaches RC.
1: Counter clock is stopped when counter reaches RC.
31
30
29
28
27
26
25
24
BSWTRG
BEEVT
BCPC
BCPB
23
22
21
20
19
18
17
16
ASWTRG
AEEVT
ACPC
ACPA
15
14
13
12
11
10
9
8
WAVE
WAVSEL
ENETRG
EEVT
EEVTEDG
7
6
5
4
3
2
1
0
CPCDIS
CPCSTOP
BURST
CLKI
TCCLKS
Value
Name
Description
0
TIMER_CLOCK1
Clock selected: internal TIMER_CLOCK1 clock signal (from PMC)
1
TIMER_CLOCK2
Clock selected: internal TIMER_CLOCK2 clock signal (from PMC)
2
TIMER_CLOCK3
Clock selected: internal TIMER_CLOCK3 clock signal (from PMC)
3
TIMER_CLOCK4
Clock selected: internal TIMER_CLOCK4 clock signal (from PMC)
4
TIMER_CLOCK5
Clock selected: internal TIMER_CLOCK5 clock signal (from PMC)
5
XC0
Clock selected: XC0
6
XC1
Clock selected: XC1
7
XC2
Clock selected: XC2
Value
Name
Description
0
NONE
The clock is not gated by an external signal.
1
XC0
XC0 is ANDed with the selected clock.
2
XC1
XC1 is ANDed with the selected clock.
3
XC2
XC2 is ANDed with the selected clock.