Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

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GO_IDLE_STATE (CMD0) to the device. GO_IDLE_STATE (CMD0) is a hard reset to the device and completely 

resets all device states.
Note that after issuing GO_IDLE_STATE (CMD0), all device initialization needs to be completed again. If the CE-

ATA device completes all MMC commands correctly but fails the ATA command with the ERR bit set in the ATA 

Status register, no error recovery action is required. The ATA command itself failed implying that the device could 

not complete the action requested, however, there was no communication or protocol failure. After the device 

signals an error by setting the ERR bit to one in the ATA Status register, the host may attempt to retry the 

command.

In boot operation mode, the processor can read boot data from the slave (MMC device) by keeping the CMD line 

low after power-on before issuing CMD1. The data can be read from either the boot area or user area, depending 

on register setting. As it is not possible to boot directly on SD-CARD, a preliminary boot code must be stored in 

internal Flash.

1. Configure the HSMCI data bus width programming SDCBUS Field in the HSMCI_SDCR. The 

BOOT_BUS_WIDTH field located in the device Extended CSD register must be set accordingly.

2. Set the byte count to 512 bytes and the block count to the desired number of blocks, writing BLKLEN and 

BCNT fields of the HSMCI_BLKR.

3. Issue the Boot Operation Request command by writing to the HSMCI_CMDR with SPCMD field set to 

BOOTREQ, TRDIR set to READ and TRCMD set to “start data transfer”.

4. The BOOT_ACK field located in the HSMCI_CMDR must be set to one, if the BOOT_ACK field of the MMC 

device located in the Extended CSD register is set to one.

5. Host processor can copy boot data sequentially as soon as the RXRDY flag is asserted.
6. When Data transfer is completed, host processor shall terminate the boot stream by writing the 

HSMCI_CMDR with SPCMD field set to BOOTEND.

The XFRDONE flag in the HSMCI_SR indicates exactly when the read or write sequence is finished.

During a read access, the XFRDONE flag behaves as shown in 

.