Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

96

Note:

Bit[0] of any address written to the PC with a BX, BLX, LDM, LDR, or POP instruction must be 1 for correct execution, 

because this bit indicates the required instruction set, and the Cortex-M4 processor only supports Thumb instructions.

Many general data processing instructions have a flexible second operand. This is shown as Operand2 in the 

descriptions of the syntax of each instruction.
Operand2

 can be a:





Specify an Operand2 constant in the form:

#constant

where constant can be:



Any constant that can be produced by shifting an 8-bit value left by any number of bits within a 32-bit word



Any constant of the form 0x00XY00XY



Any constant of the form 0xXY00XY00



Any constant of the form 0xXYXYXYXY.

 

Note:

In the constants shown above, X and Y are hexadecimal digits. 

In addition, in a small number of instructions, constant can take a wider range of values. These are described in 

the individual instruction descriptions.
When an Operand2 constant is used with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, 

TEQ or TST, the carry flag is updated to bit[31] of the constant, if the constant is greater than 255 and can be 

produced by shifting an 8-bit value. These instructions do not affect the carry flag if Operand2 is any other 

constant.

The assembler might be able to produce an equivalent instruction in cases where the user specifies a constant 

that is not permitted. For example, an assembler might assemble the instruction CMP Rd, #0xFFFFFFFE as the 

equivalent instruction CMN Rd, #0x2.

Specify an Operand2 register in the form:

Rm {, shift}

where:
Rmis the register holding the data for the second operand.
shiftis an optional shift to be applied to Rm. It can be one of:
ASR #narithmetic shift right n bits, 1 ≤ n ≤ 32.
LSL #nlogical shift left n bits, 1 ≤ n ≤ 31.
LSR #nlogical shift right n bits, 1 ≤ n ≤ 32.
ROR #nrotate right n bits, 1 ≤ n ≤ 31.
RRXrotate right one bit, with extend.
-if omitted, no shift occurs, equivalent to LSL #0.
If the user omits the shift, or specifies LSL #0, the instruction uses the value in Rm.