Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
993
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
39.7.36 PWM Channel Mode Register
Name:
PWM_CMRx [x=0..3]
Address:
0x40020200 [0], 0x40020220 [1], 0x40020240 [2], 0x40020260 [3]
Access:
Read/Write
This register can only be written if bits WPSWS2 and WPHWS2 are cleared in th
.
• CPRE: Channel Pre-scaler
• CALG: Channel Alignment
0: The period is left aligned.
1: The period is center aligned.
• CPOL: Channel Polarity
0: The OCx output waveform (output from the comparator) starts at a low level.
1: The OCx output waveform (output from the comparator) starts at a high level.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DTLI
DTHI
DTE
15
14
13
12
11
10
9
8
CES
CPOL
CALG
7
6
5
4
3
2
1
0
CPRE
Value
Name
Description
0b0000
MCK
Master clock
0b0001
MCK_DIV_2
Master clock/2
0b0010
MCK_DIV_4
Master clock/4
0b0011
MCK_DIV_8
Master clock/8
0b0100
MCK_DIV_16
Master clock/16
0b0101
MCK_DIV_32
Master clock/32
0b0110
MCK_DIV_64
Master clock/64
0b0111
MCK_DIV_128
Master clock/128
0b1000
MCK_DIV_256
Master clock/256
0b1001
MCK_DIV_512
Master clock/512
0b1010
MCK_DIV_1024
Master clock/1024
0b1011
CLKA
Clock A
0b1100
CLKB
Clock B