Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
293
32072H–AVR32–10/2012
AT32UC3A3
18.7.10
Control Register
Name:
CR
Access Type:
Write-only
Offset:
0x014 + n*0x040
Reset Value:
0x00000000
• ECLR: Transfer Error Clear
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Transfer Error bit in the Status Register (SR.TERR). Clearing the SR.TERR bit will allow the
channel to transmit data. The memory address must first be set to point to a valid location.
• TDIS: Transfer Disable
Writing a zero to this bit has no effect.
Writing a one to this bit will disable transfer for the DMA channel.
• TEN: Transfer Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will enable transfer for the DMA channel.
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
ECLR
7
6
5
4
3
2
1
0
-
-
-
-
-
-
TDIS
TEN