Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
310
32072H–AVR32–10/2012
AT32UC3A3
18.7.27
Performance Channel 1 Write Data Cycles
Name: PWDATA1
Access Type:
Read-only
Offset:
0x828
Reset Value:
0x00000000
• DATA: Data Cycles Counted Since Last Reset
Clock cycles are counted using the CLK_PDCA_HSB clock
31
30
29
28
27
26
25
24
DATA[31:24]
23
22
21
20
19
18
17
16
DATA[23:16]
15
14
13
12
11
10
9
8
DATA[15:8]
7
6
5
4
3
2
1
0
DATA[7:0]