Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

Product codes
AT32UC3A3-XPLD
Page of 1021
371
32072H–AVR32–10/2012
AT32UC3A3
19.12.17 Destination Software Transaction Request Register
Name: ReqDstReg
Access Type: Read/write
Offset: 0x370
Reset Value: 
0x00000000
A bit is assigned for each channel in this register. ReqDstReg[n] is ignored when software handshaking is not enabled for
the source of channel n.
A channel DST_REQ bit is written only if the corresponding channel write enable bit in the REQ_WE field is asserted on the
same System Bus write transfer.
• REQ_WE[11:8]: Request write enable
0 = Write disabled
1 = Write enabled
• DST_REQ[3:0]: Destination request
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
REQ_WE3
REQ_WE2
REQ_WE1
REQ_WE0
7
6
5
4
3
2
1
0
-
-
-
-
DST_REQ3
DST_REQ2
DST_REQ1
DST_REQ0