Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
380
32072H–AVR32–10/2012
AT32UC3A3
19.13 Module Configuration
The following table defines the valid settings for the DEST_PER and SRC_PER fields in the
CFGxH register. The direction is specified as observed from the DMACA. So for instance, AES -
RX means this hardware handshaking interface is connected to the input of the AES module
CFGxH register. The direction is specified as observed from the DMACA. So for instance, AES -
RX means this hardware handshaking interface is connected to the input of the AES module
l
.
Table 19-6.
DMACA Handshake Interfaces
PER Value
Hardware Handshaking Interface
0
AES - RX
1
AES - TX
2
MCI - RX
3
MCI -TX
4
MSI - RX
5
MSI - TX
6
DMACA - EXT0
7
DMACA - EXT1
Table 19-7.
DMACA External Handshake Signals
Handshaking
Interface
Interface
Function
Signal Name
DMACA - EXT0
DMA Acknowledge (DMACK0)
DMAACK[0]
DMA Request (nDMAREQ0)
DMARQ[0]
DMACA - EXT1
DMA Acknowledge (DMACK1)
DMAACK[1]
DMA Request (nDMAREQ1)
DMARQ[1]