Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
490
32072H–AVR32–10/2012
AT32UC3A3
23.9
User Interface
Note:
1. The reset values for these registers are device specific. Please refer to the Module Configuration section at the end of this
chapter.
Table 23-6.
TWIM Register Memory Map
Offset
Register
Register Name
Access
Reset
0x00
Control Register
CR
Write-only
0x00000000
0x04
Clock Waveform Generator Register
CWGR
Read/Write
0x00000000
0x08
SMBus Timing Register
SMBTR
Read/Write
0x00000000
0x0C
Command Register
CMDR
Read/Write
0x00000000
0x10
Next Command Register
NCMDR
Read/Write
0x00000000
0x14
Receive Holding Register
RHR
Read-only
0x00000000
0x18
Transmit Holding Register
THR
Write-only
0x00000000
0x1C
Status Register
SR
Read-only
0x00000002
0x20
Interrupt Enable Register
IER
Write-only
0x00000000
0x24
Interrupt Disable Register
IDR
Write-only
0x00000000
0x28
Interrupt Mask Register
IMR
Read-only
0x00000000
0x2C
Status Clear Register
SCR
Write-only
0x00000000
0x30
Parameter Register
PR
Read-only
0x34
Version Register
VR
Read-only