Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
562
32072H–AVR32–10/2012
AT32UC3A3
Writing 0x2 to the MR.MODE field configures the USART to operate in hardware handshaking
mode. The receiver will drive its RTS pin high when disabled or when the Reception Buffer Full
bit (CSR.RXBUFF) is set by the Buffer Full signal from the Peripheral DMA controller. If the
receiver RTS pin is high, the transmitter CTS pin will also be high and only the active character
transmissions will be completed. Allocating a new buffer to the DMA controller by clearing
RXBUFF, will drive the RTS pin low, allowing the transmitter to resume transmission. Detected
level changes on the CTS pin are reported by the CTS Input Change bit in the Channel Status
Register (CSR.CTSIC). An interrupt request is generated if the Input Change bit in the Interrupt
Mask Register is set. CSR.CTSIC is cleared when reading CSR.
mode. The receiver will drive its RTS pin high when disabled or when the Reception Buffer Full
bit (CSR.RXBUFF) is set by the Buffer Full signal from the Peripheral DMA controller. If the
receiver RTS pin is high, the transmitter CTS pin will also be high and only the active character
transmissions will be completed. Allocating a new buffer to the DMA controller by clearing
RXBUFF, will drive the RTS pin low, allowing the transmitter to resume transmission. Detected
level changes on the CTS pin are reported by the CTS Input Change bit in the Channel Status
Register (CSR.CTSIC). An interrupt request is generated if the Input Change bit in the Interrupt
Mask Register is set. CSR.CTSIC is cleared when reading CSR.
illustrates receiver functionality, and
illustrates transmitter
functionality.
Figure 25-18. Receiver Behavior when Operating with Hardware Handshaking
Figure 25-19. Transmitter Behavior when Operating with Hardware Handshaking
25.6.7
Modem Mode
The USART features a modem mode, supporting asynchronous communication with the follow-
ing signal pins: Data Terminal Ready (DTR), Data Set Ready (DSR), Request to Send (RTS),
Clear to Send (CTS), Data Carrier Detect (DCD), and Ring Indicator (RI). Modem mode is
enabled by writing 0x3 to MR.MODE. The USART will behave as a Data Terminal Equipment
(DTE), controlling DTR and RTS, while detecting level changes on DSR, DCD, CTS, and RI.
ing signal pins: Data Terminal Ready (DTR), Data Set Ready (DSR), Request to Send (RTS),
Clear to Send (CTS), Data Carrier Detect (DCD), and Ring Indicator (RI). Modem mode is
enabled by writing 0x3 to MR.MODE. The USART will behave as a Data Terminal Equipment
(DTE), controlling DTR and RTS, while detecting level changes on DSR, DCD, CTS, and RI.
RTS
RXBUFF
Write
CR
RXEN = 1
RXD
RXDIS = 1
CTS
TXD
Table 25-8.
Circuit References
USART Pin
V.24
CCITT
Direction
TXD
2
103
From terminal to modem
RTS
4
105
From terminal to modem
DTR
20
108.2
From terminal to modem
RXD
3
104
From modem to terminal
CTS
5
106
From terminal to modem