Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

Product codes
AT32UC3A3-XPLD
Page of 1021
565
32072H–AVR32–10/2012
AT32UC3A3
Figure 25-21. Elementary Time Unit (ETU) 
25.6.8.3
Protocol T=0
In T=0 protocol, a character is made up of one start bit, eight data bits, one parity bit, and a two
bit period guard time. During the guard time, the line will be high if the receiver does not signal a
parity error, as shown in 
. The receiver signals a parity error, aka non-acknowledge
(NACK), by pulling the line low for a bit period within the guard time, resulting in the total charac-
ter length being incremented by one, see 
. The USART will not load data to RHR if
it detects a parity error, and will set PARE if it receives a NACK.
Figure 25-22. T=0 Protocol without Parity Error 
Figure 25-23. T=0 Protocol with Parity Error 
25.6.8.4
Protocol T=1
In T=1 protocol, the character resembles an asynchronous format with only one stop bit. The
parity is generated when transmitting and checked when receiving. Parity errors set PARE.
25.6.8.5
Receive Error Counter
The USART receiver keeps count of up to 255 errors in the Number Of Errors field in the Num-
ber of Error Register (NER.NB_ERRORS). Reading NER automatically clears NB_ERRORS.
25.6.8.6
Receive NACK Inhibit
The USART can be configured to ignore parity errors by writing a one to the Inhibit Non
Acknowledge bit (MR.INACK). Erroneous characters will be treated as if they were ok, not gen-
erating a NACK, loaded to RHR, and raising RXRDY.
1 ETU
FI_DI_RATIO
ISO7816 Clock Cycles
ISO7816 Clock 
on CLK
ISO7816 I/O Line 
on TXD
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Parity
Bit
Baud Rate
Clock
Start 
Bit
Guard
Time 1
Next 
Start 
Bit
Guard
Time 2
D0
D1
D2
D3
D4
D5
D6
D7
I/O
Parity
Bit
Baud Rate
Clock
Start
Bit
Guard
Time 1
Start 
Bit
Guard
Time 2
D0
D1
Error
Repetition