Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

The different LINMR.NACT settings result in the same procedure as for the master node, see

.

Figure 25-36. Slave Node Configuration, LINMR.NACT is 0x0 (PUBLISH)

Figure 25-37. Slave Node Configuration, LINMR.NACT is 0x1 (SUBSCRIBE)

Figure 25-38. Slave Node Configuration, LINMR.NACT is 0x2 (IGNORE)

The USART can be used together with the Peripheral DMA Controller in order to transfer data
without processor intervention. The Peripheral DMA Controller uses the CSR.TXRDY and

Break

Synch

Protected

Identifier

Data 1

Data N

Checksum

TXRDY

Write

THR

Read

LINID

Data 1

Data 3

Data N-1

Data N

RXRDY

LINIDRX

Data 2

LINTC

TXRDY

Read

RHR

Read

LINID

RXRDY

LINIDRX

LINTC

Break

Synch

Protected

Identifier

Data 1

Data N

Checksum

Data 1

Data N-1

Data N-1

Data N

Data N-2

TXRDY

Read

RHR

Read

LINID

RXRDY

LINIDRX

LINTC

Break

Synch

Protected

Identifier

Data 1

Data N

Checksum

Data N-1