Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

Product codes
AT32UC3A3-XPLD
Page of 1021
759
32072H–AVR32–10/2012
AT32UC3A3
28.6.3.2
WAVSEL = 0
When CMRn.WAVSEL is zero, the value of CVn is incremented from 0 to 0xFFFF. Once
0xFFFF has been reached, the value of CVn is reset. Incrementation of CVn starts again and
the cycle continues. See 
.
An external event trigger or a software trigger can reset the value of CVn. It is important to note
that the trigger may occur at any time. See 
RC Compare cannot be programmed to generate a trigger in this configuration. At the same
time, RC Compare can stop the counter clock (CMRn.CPCSTOP = 1) and/or disable the counter
clock (CMRn.CPCDIS = 1).
Figure 28-6. WAVSEL= 0 Without Trigger
Time
Counter Value
RC
RB
RA
TIOB
TIOA
Counter cleared by compare match with 
0xFFFF
0xFFFF
Waveform Examples