Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

Consequent to MMC Specification 3.1, two types of multiple block read (or write) transactions
are defined (the host can use either one at any time):

• Open-ended/Infinite Multiple block read (or write):

The number of blocks for the read (or write) multiple block operation is not defined. The card
will continuously transfer (or program) data blocks until a stop transmission command is
received.

• Multiple block read (or write) with pre-defined block count (since version 3.1 and higher):

The card will transfer (or program) the requested number of data blocks and terminate the trans-
action. The stop command is not required at the end of this type of multiple block read (or write),
unless terminated with an error. In order to start a multiple block read (or write) with pre-defined
block count, the host must correctly set the BLKR register. Otherwise the card will start an open-
ended multiple block read. The 

MMC/SDIO Block Count - SDIO Byte Count field in the BLKR register

(BLKR.BCNT) 

defines the number of blocks to transfer (from 1 to 65535 blocks). Writing zero to

this field corresponds to an infinite block transfer.

The following flowchart shows how to read a single block with or without use of DMA Controller
facilities. In this example (see 

), a polling method is used to wait for the

end of read. Similarly, the user can configure the IER register to trigger an interrupt at the end of
read.