Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

Product codes
AT32UC3A3-XPLD
Page of 1021
983
32072H–AVR32–10/2012
AT32UC3A3
36.12 JTAG Characteristics
36.12.1
JTAG Interface Signals
Table 36-37. JTAG Interface Timing Specification
Symbol
Parameter
Conditions
 (1)
1. V
VDDIO 
from 3.0V to 3.6V, maximum external capacitor = 40pF
Min.
Max.
Unit
JTAG
0
TCK Low Half-period
6
ns
JTAG
1
TCK High Half-period
3
ns
JTAG
2
TCK Period
9
ns
JTAG
3
TDI, TMS Setup before TCK High
1
ns
JTAG
4
TDI, TMS Hold after TCK High
0
ns
JTAG
5
TDO Hold Time
4
ns
JTAG
6
TCK Low to TDO Valid
6
ns
JTAG
7
Device Inputs Setup Time
ns
JTAG
8
Device Inputs Hold Time
ns
JTAG
9
Device Outputs Hold Time
ns
JTAG
10
TCK to Device Outputs Valid
ns