Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 Data Sheet
Product codes
ATEVK1105
53
AT32UC3A
13. Power Manager (PM)
Rev: 2.0.0.1
13.1
Features
•
Controls integrated oscillators and PLLs
•
Generates clocks and resets for digital logic
•
Supports 2 crystal oscillators 450 kHz-16 MHz
•
Supports 2 PLLs 80-240 MHz
•
Supports 32 KHz ultra-low power oscillator
•
Integrated low-power RC oscillator
•
On-the fly frequency change of CPU, HSB, PBA, and PBB clocks
•
Sleep modes allow simple disabling of logic clocks, PLLs, and oscillators
•
Module-level clock gating through maskable peripheral clocks
•
Wake-up from internal or external interrupts
•
Generic clocks with wide frequency range provided
•
Automatic identification of reset sources
•
Controls brownout detector (BOD), RC oscillator, and bandgap voltage reference through control
and calibration registers
13.2
Description
The Power Manager (PM) controls the oscillators and PLLs, and generates the clocks and
resets in the device. The PM controls two fast crystal oscillators, as well as two PLLs, which can
multiply the clock from either oscillator to provide higher frequencies. Additionally, a low-power
32 KHz oscillator is used to generate the real-time counter clock for high accuracy real-time
measurements. The PM also contains a low-power RC oscillator with fast start-up time, which
can be used to clock the digital logic.
The provided clocks are divided into synchronous and generic clocks. The synchronous clocks
The provided clocks are divided into synchronous and generic clocks. The synchronous clocks
are used to clock the main digital logic in the device, namely the CPU, and the modules and
peripherals connected to the HSB, PBA, and PBB buses. The generic clocks are asynchronous
clocks, which can be tuned precisely within a wide frequency range, which makes them suitable
for peripherals that require specific frequencies, such as timers and communication modules.
The PM also contains advanced power-saving features, allowing the user to optimize the power
The PM also contains advanced power-saving features, allowing the user to optimize the power
consumption for an application. The synchronous clocks are divided into three clock domains,
one for the CPU and HSB, one for modules on the PBA bus, and one for modules on the PBB
bus.The three clocks can run at different speeds, so the user can save power by running periph-
erals at a relatively low clock, while maintaining a high CPU performance. Additionally, the
clocks can be independently changed on-the-fly, without halting any peripherals. This enables
the user to adjust the speed of the CPU and memories to the dynamic load of the application,
without disturbing or re-configuring active peripherals.
Each module also has a separate clock, enabling the user to switch off the clock for inactive
Each module also has a separate clock, enabling the user to switch off the clock for inactive
modules, to save further power. Additionally, clocks and oscillators can be automatically
switched off during idle periods by using the sleep instruction on the CPU. The system will return
to normal on occurrence of interrupts.
The Power Manager also contains a Reset Controller, which collects all possible reset sources,
The Power Manager also contains a Reset Controller, which collects all possible reset sources,
generates hard and soft resets, and allows the reset source to be identified by software.
32058K
AVR32-01/12