Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 Data Sheet
Product codes
ATEVK1105
805
AT32UC3A
(data read or code fetch) the second half (last 256 kB) of the flash may fail. This may lead to
an exception or to other errors derived from this corrupted read access.
an exception or to other errors derived from this corrupted read access.
Fix/Workaround
Flashc WP, EP, EA, WUP, EUP commands: these commands must be issued from RAM or
through the EBI. After these commands, read twice one flash page initialized to 00h in each
half part of the flash.
Flashc WP, EP, EA, WUP, EUP commands: these commands must be issued from RAM or
through the EBI. After these commands, read twice one flash page initialized to 00h in each
half part of the flash.
41.4.6
PDCA
1. Wrong PDCA behavior when using two PDCA channels with the same PID.
Workaround/fix
The same PID should not be assigned to more than one channel.
The same PID should not be assigned to more than one channel.
41.4.7
TWI
1. The TWI RXRDY flag in SR register is not reset when a software reset is performed.
Fix/Workaround
After a Software Reset, the register TWI RHR must be read.
After a Software Reset, the register TWI RHR must be read.
41.4.8
SDRAMC
1. Code execution from external SDRAM does not work
Code execution from SDRAM does not work.
Fix/Workaround
Do not run code from SDRAM.
Do not run code from SDRAM.
41.4.9
GPIO
1. Some GPIO VIH (input high voltage) are 3.6V max instead of 5V tolerant
Only 11 GPIOs remain 5V tolerant (VIHmax=5V):PB01, PB02, PB03, PB10, PB19, PB20,
PB21, PB22, PB23, PB27, PB28.
Workaround/fix
None.
PB21, PB22, PB23, PB27, PB28.
Workaround/fix
None.
41.4.10
USART
1. ISO7816 info register US_NER cannot be read
The NER register always returns zero.
Fix/Workaround
None.
Fix/Workaround
None.
41.4.11
Processor and Architecture
1. LDM instruction with PC in the register list and without ++ increments Rp
For LDM with PC in the register list:
the instruction behaves as if the ++ field is always set, ie
the pointer is always updated. This happens even if the ++ field is cleared. Specifically, the
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
2. RETE instruction does not clear SREG[L] from interrupts.
The RETE instruction clears SREG[L] as expected from exceptions.
Fix/Workaround
When using the STCOND instruction, clear SREG[L] in the stacked value of SR before
returning from interrupts with RETE.
Fix/Workaround
When using the STCOND instruction, clear SREG[L] in the stacked value of SR before
returning from interrupts with RETE.
3. Exceptions when system stack is protected by MPU
32058K
AVR32-01/12