Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Data Sheet

42023E–SAM–07/2013

Note: Comparisons are performed regardless with the SEQCFG.HWLA setting (half word left
adjust). 

Interrupt requests are enabled by writing a one to the corresponding bit in the Interrupt Enable
Register (IER) and disabled by writing a one to the corresponding bit in the Interrupt Disable
Register (IDR). Enabled interrupts can be read from the Interrupt Mask Register (IMR). Active
interrupt requests, but potentially masked, are visible in the Status Register (SR). To clear an
active interrupt request, write a one to the corresponding bit in the Clear Register (CR).

The Status Register (SR) fields in common with IER/IDR/IMR show the status since the last
write to the Interrupt Clear Register. Other SR fields show the status at the time being read.

For performance and electrical characteristics of the ADCIFE, refer to 

Window Monitor Modes

WM field in WCFGy 

Modes

0

0

0

No window mode (default)

0

0

1

Mode 1: active when result > LT

0

1

0

Mode 2: active when result < HT

0

1

1

Mode 3: active when LT < result < HT 

1

0

0

Mode 4: active when (!(LT < result < HT))

1

0

1

reserved

1

1

0

reserved

1

1

1

reserved

ADCIFE Interrupt Group

Line

Line Description

Related Status

0

Sequencer

Sequencer end of conversion (SEOC)

Sequencer (last converted value) overrun (LOVR)

Sequencer missed trigger event (SMTRG)

Timing

Timer time-out

Window

Window monitor