Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Data Sheet

42023E–SAM–07/2013

One interrupt vector is assigned to the USBC.

 and 

 for further details about device and host interrupts.

 for asynchronous interrupts.

When the USB clock is frozen, it is still possible to access the following bits: UIMOD, FRZCLK,
and USBE in the USBCON register, and LS in the UDCON register.

When FRZCLK is set, only the asynchronous interrupts can trigger a USB interrupt (see 

When the USBC interface is in device mode, the speed selection is done by the UDCON.LS bit,
connecting an internal pull-up resistor to either DP (full-speed mode) or DM (low-speed mode).
The LS bit shall be written before attaching the device, which can be simulated by clearing the
UDCON.DETACH bit.

Figure 17-3. Speed Selection in device mode

When the USBC interface is in host mode, internal pull-downs are enabled on both DP and DM.
The interface detects the speed of the connected device and reflects this in the Speed Status
field (USBSTA.SPEED).

Endpoints and pipe buffers can be allocated anywhere in the embedded memory (CPU RAM or
HSB RAM).

.

R

PU

UDCON.DETACH

DP

DM

UDCON.LS

VBUS