Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Data Sheet

42023E–SAM–07/2013

The TWIS has two modes of operation:

• Slave transmitter mode

• Slave receiver mode

A master is a device which starts and stops a transfer and generates the TWCK clock. A slave is
assigned an address and responds to requests from the master. These modes are described in
the following chapters. 

Figure 28-5. Typical Application Block Diagram

After reset and initialization, the TWIS is either in Standard-mode, Fast-mode, or Fast-mode
Plus (collectively referred to as the F/S-mode). The TWIS automatically enters High-speed-
mode (HS-mode) after it detects the following conditions (all of which are in F/S-mode) on the
bus:

1.

START condition (S)

2.

8-bit master code (0000 1XXX)

3.

Not-acknowledge bit (NA)

After the TWIS has detected the above conditions and before the commencement of HS-mode
transfer, it does the following:

1.

Adapts the TWD and TWCK input filters to the spike suppression requirement in HS-
mode.

2.

Adapts the TWD output stage to the slope control requirement in HS-mode.

The TWIS automatically returns to F/S-mode after it detects a STOP condition on the bus.

With regard to the slope control of the TWD output, the user can control the fall times of the
TWD output in F/S- and HS-mode by writing to the Data Drive Strength LOW (DADRIVEL) and
Data Slew Limit (DASLEW) fields in the Slew Rate Register (SRR) and HS-mode Slew Rate
Register (HSSRR), respectively. Refer to 

for appropriate values of these register fields.

Note that the fall times of the TWD output are also controlled by the corresponding register fields
in the Two-wire Master Interface (TWIM) module. In order to correctly control the slew rate of the
TWD output, the user must either

Host with

TWI

Interface

TWD

TWCK

Atmel TWI

Serial EEPROM

I²C RTC

I²C LCD

Controller

Slave 1

Slave 2

Slave 3

VDD

I²C Temp.

Sensor

Slave 4

Rp: Pull up value as given by the I²C Standard

Rp

Rp