Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet
Product codes
ATSAM4L-XSTK
61
42023E–SAM–07/2013
ATSAM4L8/L4/L2
8.
Debug and Test
8.1
Features
•
IEEE1149.1 compliant JTAG Debug Port
•
Serial Wire Debug Port
•
Boundary-Scan chain on all digital pins for board-level testing
•
Direct memory access and programming capabilities through debug ports
•
Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches
•
Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system
profiling
•
Instrumentation Trace Macrocell (ITM) for support of printf style debugging
•
Chip Erase command and status
•
Unlimited Flash User page read access
•
Cortex-M4 core reset source
•
CRC32 of any memory accessible through the bus matrix
•
Debugger Hot Plugging
8.2
Overview
Debug and test features are made available to external tools by:
• The Enhanced Debug Port (EDP) embedding:
– a Serial Wire Debug Port (SW-DP) part of the ARM coresight architecture
– an IEEE 1149.1 JTAG Debug Debug Port (JTAG-DP) part of the ARM coresight
architecture
– a supplementary IEEE 1149.1 JTAG TAP machine that implements the boundary
scan feature
• The System Manager Acces Port (SMAP) providing unlimited flash User page read access,
CRC32 of any memory accessible through the bus matrix and Cortex-M4 core reset services
• The AHB Access Port (AHB-AP) providing Direct memory access, programming capabilities
and standard debugging functions
• The Instrumentation Trace macrocell part of the ARM coresight architecture
For more information on ARM debug components, refer to:
• ARMv7-M Architecture Reference Manual
• ARM Debug Interface v5.1 Architecture Specification document
• ARM CoreSight Architecture Specification
• ARM ETM Architecture Specification v3.5
• ARM Cortex-M4 Technical Reference Manual