Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet

42023E–SAM–07/2013

SR

Read-only

0x08

0x00000000

This field is cleared when SCR.TXUR is written to one.

Bit i of this field is set when a transmit underrun error occurred in channel i (i=0 for first channel of the frame).

This field is cleared when SCR.RXOR is written to one.

Bit i of this field is set when a receive overrun error occurred in channel i (i=0 for first channel of the frame).

This bit is cleared when the corresponding bit in SCR is written to one.

This bit is set when an underrun error occurs on the THR register or when the corresponding bit in SSR is written to one.

This bit is cleared when data is written to THR.

This bit is set when the THR register is empty and can be written with new data to be transmitted.

This bit is cleared when the Transmitter is effectively disabled, following a CR.TXDIS or CR.SWRST request.

This bit is set when the Transmitter is effectively enabled, following a CR.TXEN request.

This bit is cleared when the corresponding bit in SCR is written to one.

This bit is set when an overrun error occurs on the RHR register or when the corresponding bit in SSR is written to one.

This bit is cleared when the RHR register is read.

This bit is set when received data is present in the RHR register.

This bit is cleared when the Receiver is effectively disabled, following a CR.RXDIS or CR.SWRST request.

This bit is set when the Receiver is effectively enabled, following a CR.RXEN request.

31

30

29

28

27

26

25

24

-

-

-

-

-

-

-

-

23

22

21

20

19

18

17

16

-

-

TXURCH

-

-

-

-

15

14

13

12

11

10

9

8

-

-

-

-

-

-

RXORCH

7

6

5

4

3

2

1

0

-

TXUR

TXRDY

TXEN

-

RXOR

RXRDY

RXEN