Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet

Product codes
ATSAM4L-XSTK
Page of 1204
803
42023E–SAM–07/2013
ATSAM4L8/L4/L2
When using the TIOA/TIOB lines as inputs the user must make sure that no peripheral events
are generated on the line. Refer to 
 for details.
30.5.2
Power Management
If the CPU enters a sleep mode that disables clocks used by the TC, the TC will stop functioning
and resume operation after the system wakes up from sleep mode.
30.5.3
Clocks
The clock for the TC bus interface (CLK_TC) is generated by the Power Manager. This clock is
disabled at reset, and can be enabled in the Power Manager. It is recommended to disable the
TC before disabling the clock, to avoid freezing the TC in an undefined state.
30.5.4
Interrupts
The TC interrupt request line is connected to the NVIC. Using the TC interrupt requires the NVIC
to be programmed first.
30.5.5
Peripheral Events
The TC peripheral events are connected via the Peripheral Event System. Refer to 
 for details.
30.5.6
Debug Operation
The Timer Counter clocks are frozen during debug operation, unless the OCD system keeps
peripherals running in debug operation.
30.6
Functional Description
30.6.1
TC Description
The three channels of the Timer Counter are independent and identical in operation. The regis-
ters for channel programming are listed in 
30.6.1.1
Channel I/O Signals
As described in 
each Channel has the following I/O signals.
30.6.1.2
16-bit counter 
Each channel is organized around a 16-bit counter. The value of the counter is incremented at
each positive edge of the selected clock. When the counter has reached the value 0xFFFF and
Table 30-2.
Channel I/O Signals Description
Block/Channel Signal Name
Description
Channel Signal
XC0, XC1, XC2
External Clock Inputs
TIOA
Capture mode: Timer Counter Input
Waveform mode: Timer Counter Output
TIOB
Capture mode: Timer Counter Input
Waveform mode: Timer Counter Input/Output
INT
Interrupt Signal Output
SYNC
Synchronization Input Signal