Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
126
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
15.8.8 APBA Mask
Name:
APBAMASK
Offset:
0x18
Reset:
0x0000007F
Property:
Write-Protected
z
Bits 31:7 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 6 – EIC: EIC APB Clock Enable
0: The APBA clock for the EIC is stopped.
1: The APBA clock for the EIC is enabled.
0: The APBA clock for the EIC is stopped.
1: The APBA clock for the EIC is enabled.
z
Bit 5 – RTC: RTC APB Clock Enable
0: The APBA clock for the RTC is stopped.
1: The APBA clock for the RTC is enabled.
0: The APBA clock for the RTC is stopped.
1: The APBA clock for the RTC is enabled.
z
Bit 4 – WDT: WDT APB Clock Enable
0: The APBA clock for the WDT is stopped.
1: The APBA clock for the WDT is enabled.
0: The APBA clock for the WDT is stopped.
1: The APBA clock for the WDT is enabled.
z
Bit 3 – GCLK: GCLK APB Clock Enable
0: The APBA clock for the GCLK is stopped.
1: The APBA clock for the GCLK is enabled.
0: The APBA clock for the GCLK is stopped.
1: The APBA clock for the GCLK is enabled.
Bit
31
30
29
28
27
26
25
24
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
EIC
RTC
WDT
GCLK
SYSCTRL
PM
PAC0
Access
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
1
1
1
1
1
1
1