Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
193
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
16.8.16 Voltage References System (VREF) Control
Name:
VREF
Offset:
0x40
Reset:
0x0XXX0000
Property:
Write-Protected
z
Bits 31:27 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bits 26:16 – CALIB[10:0]: Bandgap Voltage Generator Calibration
These bits are used to calibrate the output level of the bandgap voltage reference. These bits are loaded from
Flash Calibration Row at startup. Refer to
These bits are used to calibrate the output level of the bandgap voltage reference. These bits are loaded from
Flash Calibration Row at startup. Refer to
for more details.
z
Bits 15:3 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 2 – BGOUTEN: Bandgap Output Enable
0: The bandgap output is not available as an ADC input channel.
1: The bandgap output is routed to an ADC input channel.
0: The bandgap output is not available as an ADC input channel.
1: The bandgap output is routed to an ADC input channel.
z
Bit 1 – TSEN: Temperature Sensor Enable
0: Temperature sensor is disabled.
1: Temperature sensor is enabled and routed to an ADC input channel.
0: Temperature sensor is disabled.
1: Temperature sensor is enabled and routed to an ADC input channel.
Bit
31
30
29
28
27
26
25
24
CALIB[10:8]
Access
R
R
R
R
R
R/W
R/W
R/W
Reset
0
0
0
0
0
X
X
X
Bit
23
22
21
20
19
18
17
16
CALIB[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
X
X
X
X
X
X
X
X
Bit
15
14
13
12
11
10
9
8
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
BGOUTEN
TSEN
Access
R
R
R
R
R
R/W
R/W
R
Reset
0
0
0
0
0
0
0
0