Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

Product codes
ATSAMD21-XPRO
Page of 1018
506
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
When BAUDLOW is non-zero, the following formula can be used to determine the SCL frequency:
The following formulas can be used to determine the SCL T
LOW
 and T
HIGH
 times:
For Fast-mode Plus the nominal high to low SCL ratio is 1 to 2 and BAUD should be set accordingly. At a minimum, 
BAUD.BAUD and/or BAUD.BAUDLOW must be non-zero.
27.6.2.5  Master Clock Generation (High-speed mode Transfer)
For High-speed mode transfers, there is no SCL synchronization, so the SCL frequency is determined by the GCLK 
frequency and the High-speed BAUD setting. When HSBAUDLOW is zero, the HSBAUD value is used to time both SCL 
high and SCL low. In this case the following formula can be used to determine the SCL frequency.
When HSBAUDLOW is non-zero, the following formula can be used to determine the SCL frequency.
For High-speed the nominal high to low SCL ratio is 1 to 2 and HSBAUD should be set accordingly. At a minimum, BAUD.BAUD 
and/or BAUD.BAUDLOW must be non-zero.
27.6.2.6  I
2
C Master Operation
The I
2
C master is byte-oriented and interrupt based. The number of interrupts generated is kept at a minimum by 
automatic handling of most events. Auto-triggering of operations and a special smart mode, which can be enabled by 
writing a one to the Smart Mode Enable bit in the Control A register (CTRLA.SMEN), are included to reduce software 
driver complexity and code size. 
The I2C master has two interrupt strategies. When SCL Stretch Mode (CTRLA.SCLSM) is set to zero, SCL is stretched 
before or after the acknowledge bit . In this mode the I
2
C master operates according to the behavior diagram shown in 
The circles with a capital letter M followed by a number (M1, M2... etc.) indicate which node in the figure the 
bus logic can jump to based on software or hardware interaction. 
This diagram is used as reference for the description of the I
2
C master operation throughout the document.
RISE
GCLK
GCLK
SCL
T
BAUDLOW
BAUD
f
f
f
+
+
+
=
10
GCLK
low
f
BAUDLOW
BAUD
T
5
.
+
=
GCLK
HIGH
f
BAUD
BAUD
T
5
.
+
=
)
1
(
2
HSBAUD
f
f
GCLK
SCL
+
=
HSBAUDLOW
HSBAUD
f
f
GCLK
SCL
+
+
=
2