Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

The counter mode is selected with the TC Mode bit group in the Control A register (CTRLA.MODE). By default, the 
counter is enabled in the 16-bit counter mode.

Three counter modes are available:

z

COUNT8: The 8-bit TC has its own Period register (PER). This register is used to store the period value that can 
be used as the top value for waveform generation.

z

COUNT16: This is the default counter mode. There is no dedicated period register in this mode. 

z

COUNT32: This mode is achieved by pairing two 16-bit TC peripherals. This pairing is explained in 

. The even-numbered TC instance will act as master to the odd-numbered TC peripheral, which will act 

as a slave. The slave status of the slave is indicated by reading the Slave bit in the Status register 
(STATUS.SLAVE). The registers of the slave will not reflect the registers of the 32-bit counter. Writing to any of the 
slave registers will not affect the 32-bit counter. Normal access to the slave COUNT and CCx registers is not 
allowed.

The counter can be set to count up or down. When the counter is counting up and the top value is reached, the counter 
will wrap around to zero on the next clock cycle. When counting down, the counter will wrap around to the top value when 
zero is reached. In one-shot mode, the counter will stop counting after a wraparound occurs.

To set the counter to count down, write a one to the Direction bit in the Control B Set register (CTRLBSET.DIR). To count 
up, write a one to the Direction bit in the Control B Clear register (CTRLBCLR.DIR).

Each time the counter reaches the top value or zero, it will set the Overflow Interrupt flag in the Interrupt Flag Status and 
Clear register (INTFLAG.OVF). It is also possible to generate an event on overflow or underflow when the 
Overflow/Underflow Event Output Enable bit in the Event Control register (EVCTRL.OVFEO) is one.

The counter value can be read from the Counter Value register (COUNT) or a new value can be written to the COUNT 
register. 

 gives an example of writing a new counter value.

 

The COUNT value will always be zero when 

starting the TC, unless some other value has been written to it or if the TC has been previously reloaded at TOP value, 
because stopped while TC was counting down.

On the stop command, which can be evoked in the Command bit group in the Control B Set register (CTRLBSET.CMD), 
the counter will retain its current value. All waveforms are cleared. The counter stops counting, and the Stop bit in the 
Status register is set (STATUS.STOP).