Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
904
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
34.6.3.3 Data Buffer
The Data Buffer register (
) and the Data register (
) are linked together to form a two-stage FIFO. The
DAC uses the Start Conversion event to load data from DATABUF into DATA and start a new conversion. The Start
Conversion event is enabled by writing a one to the Start Event Input bit in the Event Control register
(EVCTRL.STARTEI). If a Start Conversion event occurs when DATABUF is empty, an Underrun interrupt request is
generated if the Underrun interrupt is enabled.
Conversion event is enabled by writing a one to the Start Event Input bit in the Event Control register
(EVCTRL.STARTEI). If a Start Conversion event occurs when DATABUF is empty, an Underrun interrupt request is
generated if the Underrun interrupt is enabled.
The DAC can generate a Data Buffer Empty event when DATABUF becomes empty and new data can be loaded to the
buffer. The Data Buffer Empty event is enabled by writing a one to the Empty Event Output bit in the Event Control
register (EVCTRL.EMPTYEO). A Data Buffer Empty interrupt request is generated if the Data Buffer Empty interrupt is
enabled.
buffer. The Data Buffer Empty event is enabled by writing a one to the Empty Event Output bit in the Event Control
register (EVCTRL.EMPTYEO). A Data Buffer Empty interrupt request is generated if the Data Buffer Empty interrupt is
enabled.
34.6.3.4 Voltage Pump
When the DAC is used at operating voltages lower than 2.5V, the voltage pump must be enabled. This enabling is done
automatically, depending on operating voltage.
automatically, depending on operating voltage.
The voltage pump can be disabled by writing a one to the Voltage Pump Disable bit in the Control B register
(CTRLB.VPD). This can be used to reduce power consumption when the operating voltage is above 2.5V.
(CTRLB.VPD). This can be used to reduce power consumption when the operating voltage is above 2.5V.
The voltage pump uses the asynchronous GCLK_DAC clock, and requires that the clock frequency be at least four times
higher than the sampling period.
higher than the sampling period.
34.6.3.5 Sampling Period
As there is no automatic indication that a conversion is done, the sampling period must be greater than or equal to the
specified conversion time.
specified conversion time.
34.6.4 DMA, Interrupts and Events
34.6.4.1 DMA Operation
The DAC generates the following DMA request:
z
Data Buffer Empty (EMPTY): the request is set when the Data Buffer register is empty (data transferred from
DATABUF to DATA). The request is cleared when DATABUF is written.
DATABUF to DATA). The request is cleared when DATABUF is written.
For each Start Conversion event, DATABUF is transferred into DATA and the conversion starts. When DATABUF is
empty, the DAC generates the DMA request for new data. As DATABUF is initially not empty, it must be written by the
CPU before the first event occurs.
empty, the DAC generates the DMA request for new data. As DATABUF is initially not empty, it must be written by the
CPU before the first event occurs.
If the CPU accesses the registers that are the source of a DMA request set/clear condition, the DMA request can be lost
or the DMA transfer can be corrupted, if enabled.
or the DMA transfer can be corrupted, if enabled.
When DAC registers are write-protected by Peripheral Access Controller, DATABUF cannot be written. To bypass
DATABUF write protection, Bypass DATABUF Write Protection bit (CTRLB.BDWP) must be written to one.
DATABUF write protection, Bypass DATABUF Write Protection bit (CTRLB.BDWP) must be written to one.
Table 34-1. Moduel Request for ADC
Condition
Interrupt request
Event output
Event input
DMA request
DMA request is
cleared
Data Buffer
Empty
Empty
x
x
x
When DATABUF
is written
Underrun
x
Synchronization
Ready
Ready
x
Start Conversion
x