Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet
Product codes
MEGA328P-XMINI
142
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
18.
8-bit Timer/Counter2 with PWM and Asynchronous Operation
18.1
Features
•
Single Channel Counter
•
Clear Timer on Compare Match (Auto Reload)
•
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
•
Frequency Generator
•
10-bit Clock Prescaler
•
Overflow and Compare Match Interrupt Sources (TOV2, OCF2A and OCF2B)
•
Allows Clocking from External 32kHz Watch Crystal Independent of the I/O Clock
18.2
Overview
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. A simplified block diagram of
the 8-bit Timer/Counter is shown in
the 8-bit Timer/Counter is shown in
. For the actual placement of I/O pins, refer to
. CPU accessible I/O Registers, including I/O bits and I/O
pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the
The PRTIM2 bit in
must be written to zero to enable
Timer/Counter2 module.
Figure 18-1.
8-bit Timer/Counter Block Diagram
18.2.1 Registers
The Timer/Counter (TCNT2) and Output Compare Register (OCR2A and OCR2B) are 8-bit registers. Interrupt
request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR2). All interrupts are
request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR2). All interrupts are
Clock Select
Timer/Counter
DA
T
A
B
U
S
OCRnA
OCRnB
=
=
TCNTn
Waveform
Generation
Waveform
Generation
OCnA
OCnB
=
Fixed
TOP
Value
Control Logic
=
0
TOP
BOTTOM
Count
Clear
Direction
TOVn
(Int.Req.)
(Int.Req.)
OCnA
(Int.Req.)
(Int.Req.)
OCnB
(Int.Req.)
(Int.Req.)
TCCRnA
TCCRnB
Tn
Edge
Detector
( From Prescaler )
clk
Tn