Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet
Product codes
MEGA328P-XMINI
146
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
18.6
Compare Match Output Unit
The Compare Output mode (COM2x1:0) bits have two functions. The Waveform Generator uses the COM2x1:0
bits for defining the Output Compare (OC2x) state at the next compare match. Also, the COM2x1:0 bits control
the OC2x pin output source.
bits for defining the Output Compare (OC2x) state at the next compare match. Also, the COM2x1:0 bits control
the OC2x pin output source.
shows a simplified schematic of the logic affected by the COM2x1:0 bit
setting. The I/O Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O
Port Control Registers (DDR and PORT) that are affected by the COM2x1:0 bits are shown. When referring to
the OC2x state, the reference is for the internal OC2x Register, not the OC2x pin.
Port Control Registers (DDR and PORT) that are affected by the COM2x1:0 bits are shown. When referring to
the OC2x state, the reference is for the internal OC2x Register, not the OC2x pin.
Figure 18-4.
Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2x) from the Waveform Generator if
either of the COM2x1:0 bits are set. However, the OC2x pin direction (input or output) is still controlled by the
Data Direction Register (DDR) for the port pin. The Data Direction Register bit for the OC2x pin (DDR_OC2x)
must be set as output before the OC2x value is visible on the pin. The port override function is independent of
the Waveform Generation mode.
either of the COM2x1:0 bits are set. However, the OC2x pin direction (input or output) is still controlled by the
Data Direction Register (DDR) for the port pin. The Data Direction Register bit for the OC2x pin (DDR_OC2x)
must be set as output before the OC2x value is visible on the pin. The port override function is independent of
the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2x state before the output is enabled.
Note that some COM2x1:0 bit settings are reserved for certain modes of operation. See
Note that some COM2x1:0 bit settings are reserved for certain modes of operation. See
18.6.1 Compare Output Mode and Waveform Generation
The Waveform Generator uses the COM2x1:0 bits differently in normal, CTC, and PWM modes. For all modes,
setting the COM2x1:0 = 0 tells the Waveform Generator that no action on the OC2x Register is to be performed
on the next compare match. For compare output actions in the non-PWM modes refer to
setting the COM2x1:0 = 0 tells the Waveform Generator that no action on the OC2x Register is to be performed
on the next compare match. For compare output actions in the non-PWM modes refer to
. For fast PWM mode, refer to
, and for phase correct PWM refer to
A change of the COM2x1:0 bits state will have effect at the first compare match after the bits are written. For
non-PWM modes, the action can be forced to have immediate effect by using the FOC2x strobe bits.
non-PWM modes, the action can be forced to have immediate effect by using the FOC2x strobe bits.
PORT
DDR
D
Q
D
Q
OCnx
Pin
OCnx
D
Q
Waveform
Generator
COMnx1
COMnx0
0
1
D
ATA
B
U
S
FOCnx
clk
I/O