Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet

Product codes
MEGA328P-XMINI
Page of 657
16
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
7.7.1
Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is four clock cycles minimum. After four 
clock cycles the program vector address for the actual interrupt handling routine is executed. During this four 
clock cycle period, the Program Counter is pushed onto the Stack. The vector is normally a jump to the interrupt 
routine, and this jump takes three clock cycles. If an interrupt occurs during execution of a multi-cycle 
instruction, this instruction is completed before the interrupt is served. If an interrupt occurs when the MCU is in 
sleep mode, the interrupt execution response time is increased by four clock cycles. This increase comes in 
addition to the start-up time from the selected sleep mode.
A return from an interrupt handling routine takes four clock cycles. During these four clock cycles, the Program 
Counter (two bytes) is popped back from the Stack, the Stack Pointer is incremented by two, and the I-bit in 
SREG is set.
Assembly Code Example
sei
; set Global Interrupt Enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending interrupt(s)
C Code Example
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */