Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet
Product codes
MEGA328P-XMINI
95
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
15.2.1 Definitions
Many register and bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number, in this case 0. A lower case “x” replaces the Output Compare Unit, in this case Compare
Unit A or Compare Unit B. However, when using the register or bit defines in a program, the precise form must
be used, i.e., TCNT0 for accessing Timer/Counter0 counter value and so on.
Timer/Counter number, in this case 0. A lower case “x” replaces the Output Compare Unit, in this case Compare
Unit A or Compare Unit B. However, when using the register or bit defines in a program, the precise form must
be used, i.e., TCNT0 for accessing Timer/Counter0 counter value and so on.
The definitions in
are also used extensively throughout the document.
Table 15-1.
Definitions
15.2.2 Registers
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit registers. Interrupt
request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag Register (TIFR0).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are
not shown in the figure.
request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag Register (TIFR0).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are
not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on the T0 pin.
The Clock Select logic block controls which clock source and edge the Timer/Counter uses to increment (or
decrement) its value. The Timer/Counter is inactive when no clock source is selected. The output from the Clock
Select logic is referred to as the timer clock (clk
The Clock Select logic block controls which clock source and edge the Timer/Counter uses to increment (or
decrement) its value. The Timer/Counter is inactive when no clock source is selected. The output from the Clock
Select logic is referred to as the timer clock (clk
T0
).
The double buffered Output Compare Registers (OCR0A and OCR0B) are compared with the Timer/Counter
value at all times. The result of the compare can be used by the Waveform Generator to generate a PWM or
variable frequency output on the Output Compare pins (OC0A and OC0B). See
value at all times. The result of the compare can be used by the Waveform Generator to generate a PWM or
variable frequency output on the Output Compare pins (OC0A and OC0B). See
for details. The compare match event will also set the Compare Flag (OCF0A or OCF0B)
which can be used to generate an Output Compare interrupt request.
15.3
Timer/Counter Clock Sources
The Timer/Counter can be clocked by an internal or an external clock source. The clock source is selected by
the Clock Select logic which is controlled by the Clock Select (CS02:0) bits located in the Timer/Counter Control
Register (TCCR0B). For details on clock sources and prescaler, see
the Clock Select logic which is controlled by the Clock Select (CS02:0) bits located in the Timer/Counter Control
Register (TCCR0B). For details on clock sources and prescaler, see
.
15.4
Counter Unit
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
shows a
block diagram of the counter and its surroundings.
BOTTOM
The counter reaches the BOTTOM when it becomes 0x00.
MAX
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
TOP
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is
dependent on the mode of operation.
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is
dependent on the mode of operation.