Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Power Up and Reset Sequence
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
103
NOTES:.
1.
the rail to rail kick off delay min is 0.5 ms and max 3 ms.
2.
The Power Down Slew rate min is 0.1 ms and max is 10 ms.
3.
Switched/CORE rails should be turned off at the same time. Alternately, it’s ok to turn off all Switch/
CORE rails in the reverse order of power up paying attention to t2 timing if so. Both sequences are
shown.
4.
An alternate SUS rail sequence allows swapping V1P8A with V1P0A.
Figure 14. S0 to S3 to S4/S5 (Power Down) Sequence without S0ix
A
lw
ay
s
O
n
/S
U
S
S
w
it
ch
ed
O
n
/C
O
R
E
PMC_PLTRST# (O)
PMC_CORE_PWROK (I)
PMC_SLP_S3# (O)
VDD_VTT
V3P3S
V1P8S
V1P24S
V1P35S
V1P05S
V1P0S
VCC
VNN
DRAM_VDD_S4_PWROK (I)
VDD
PMC_SLP_S4# (O)
PMC_RSMRST# (I)
V3P3A
V1P24A
V1P8A
V1P0A
DRAM_CORE_PWROK (I)
S4/5G3
S3S4/5
S0S3
PMC_SLP_S3# first, PMC_SLP_S4#
at the same time or just after.
PMC_SUSPWRDNACK (O)
High if requesting SoC G3
See Note 1