Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

1043

The SoC has three MIPI clock lanes and five MIPI data lanes. The Analog Front End 
(AFE) and Digital Physical Layer (DPHY) take these lanes and connects them to three 
virtual ports. Two data lanes are dedicated to each of the rear facing cameras and the 
remaining one data lane is connected to the front facing camera. The MIPI interfaces 
follow the MIPI-CSI-2 specifications as defined by the MIPI Alliance. They support 
YUV420, YUV422, RGB444, RGB555, RGB565, RGB 888 and RAW 8b/10b/12b. Both 
MIPI ports support compression settings specified in MIPI-CSI-2 draft specification 
1.01.00 Annex E. The compression is implemented in Hardware with support for 
Predictor 1 and Predictor 2. Supported compression schemes:

• 12-8-12
• 12-7-12
• 12-6-12
• 10-8-10
• 10-7-10
• 10-6-10

The data compression schemes above use an X-Y-Z naming convention where X is the 
number of bits per pixel in the original image, Y is the encoded (compressed) bits per 
pixel and Z is the decoded (uncompressed) bits per pixel.

Twelve (12) GPIO signals are allocated for camera functions, refer to 

signal names. These GPIOs are multiplexed and are available for other usages without 
powering on the ISP. The ISP provides a timing control block through which the GPIOs 
can be controlled to support assertion, de-assertion, pulse widths and delay. The 
configuration below of camera GPIOs is just an example of how the GPIOs can be used. 
Several of these functions could be implemented using I

2

C, depending on the sensor 

implementation for the platform.

• Sensor Reset signals

—Force hardware reset on one or more of the sensors.

• Sensor Single Shot Trigger signal

—Indicate that the target sensor needs to send a full frame in a single shot mode, 

or to capture the full frame for flash synchronization.

• PreLight Trigger signal

—Light up a pilot lamp prior to firing the flash for preventing red-eye.

• Flash Trigger signal

—Indicate that a full frame is about to be captured. The Flash fires when it detects 

an assertion of the signal.

• Sensor Strobe Trigger signal

—Asserted by the target sensor to indicate the start of a full frame, when it is 

configured in the single shot mode, or to indicate a flash exposed frame for 

flash synchronization.