Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
1125
15.8.8
reg_gpd_gp_reg_reg_gp_mod_stream_stat_type 
(gpd_gp_reg_reg_gp_mod_stream_stat)—Offset 1Ch
Indicate the status of the streaming ports of the modules. All module's valid and accept 
ports used for control are reflected in this register.
Access Method
Default: AA88A222h
2
0h
RO
ISP_STR_MON_PIF2ISP_valid: 
Returns the value 1 if a valid acknowledge token 
from the FIFO between the primary input formatter acknowledge port and the ISP, is 
present on the primary input formatter input port of the ISP. Returns the value 0 if there 
is no valid acknowledge token available on this ISP input port.
1
0h
RO
ISP_STR_MON_ISP2PIF_accept: 
Returns the value 1 if the command FIFO between 
ISP and the Primary input formatter can accept a command from the ISP. Returns the 
value 0 if this command FIFO is full.
0
0h
RO
ISP_STR_MON_ISP2PIF_valid: 
Returns the value 1 if ISP sends a command using 
the streaming port connected to the Primary Input Formatter command FIFO. Returns 
the value 0 if the ISP does not send a command to the Primary Input formatter
Bit 
Range
Default & 
Access
Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
gpd_gp_reg_reg_gp_mod_stream_stat: 
ISPMMADR Type: 
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference: 
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
1 0 1 0 1 0 1 0 1 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0
MOD
_
STR_MON_CELLS2
G
DC2_acc
ep
t
MOD_STR_MON_C
E
LLS2GDC2_v
alid
MOD
_
STR_MON_GDC2
2CEL
LS_acc
ep
t
MOD_STR_MON_G
D
C
22CELLS_v
alid
MOD
_
STR_MON_CELLS2
G
DC1_acc
ep
t
MOD_STR_MON_C
E
LLS2GDC1_v
alid
MOD
_
STR_MON_GDC1
2CEL
LS_acc
ep
t
MOD_STR_MON_G
D
C
12CELLS_v
alid
MOD_STR_MON_SP2DMA_acc
ep
t
M
O
D
_
ST
R
_
MO
N
_
S
P2D
MA
_
va
lid
MOD_STR_MON_DMA2SP_acc
ep
t
MOD_ST
R_MO
N_D
M
A
2
SP
_v
alid
MOD_STR_MON_ISP2DMA_acc
ept
MOD_ST
R_M
O
N_
ISP2
DM
A_v
alid
MOD_STR_MON_DMA2ISP_acc
ept
MOD_ST
R_M
O
N_
DM
A2ISP_v
alid
MOD_ST
R_MO
N_SP
2MC
_
acc
ep
t
M
O
D_STR_MON_SP
2MC_v
alid
M
O
D
_
ST
R
_
MO
N
_
MC
2
S
P_
ac
ce
p
t
M
O
D_STR_MON_MC2SP_v
alid
MOD_STR_MON_SP2SIF_acc
ep
t
MOD_ST
R_M
O
N_
SP2
S
IF_v
alid
MOD_STR_MON_SIF2SP_acc
ep
t
MOD_ST
R_MO
N_S
IF2SP
_v
alid
MOD_ST
R_M
O
N_CE
LLS2PIFB_acc
ep
t
MO
D_STR
_
MO
N_C
E
LL
S2P
IFB_v
alid
MOD_ST
R_M
O
N_P
IFB2CEL
LS_acc
ep
t
M
O
D_STR
_
MON
_
PIFB2CELLS_v
alid
MOD_STR_MON_C
E
LLS2PIF
A_acc
ept
MOD_ST
R_M
O
N_
CE
LLS2PIF
A
_
va
lid
MOD_STR_MON_P
IF
A
2CEL
LS_acc
ep
t
MOD_ST
R_M
O
N_
PIF
A
2CELLS_v
alid
Bit 
Range
Default & 
Access
Description
31
1h
RO
MOD_STR_MON_CELLS2GDC2_accept: 
Returns the value 1 if the acknowledge FIFO 
between GDC2 and ISP/SP can accept an acknowledge token from GDC2. Returns the 
value 0 if this FIFO is full.
30
0h
RO
MOD_STR_MON_CELLS2GDC2_valid: 
Returns the value 1 if GDC2 sends an 
acknowledge token using the streaming port connected to the acknowledge FIFO to the 
ISP/SP. Returns the value 0 if GDC2 does not send an acknowledge token to this FIFO.
29
1h
RO
MOD_STR_MON_GDC22CELLS_accept: 
Returns the value 1 if GDC2 can accept a 
command token from the command FIFO between the ISP/SP and GDC2. Returns the 
value 0 if GDC2 cannot accept a command token.