Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
1134
Datasheet
15.8.18
reg_gpd_gp_reg_reg_gp_switch_gdc1_type
(gpd_gp_reg_reg_gp_switch_gdc1)—Offset 44h
Access Method
Default: 00000000h
15.8.19
reg_gpd_gp_reg_reg_gp_switch_gdc2_type
(gpd_gp_reg_reg_gp_switch_gdc2)—Offset 48h
Access Method
Default: 00000000h
0
0h
RW
reg_gp_switch_if:
Selects the control stream switch for the primary input formatter
and for primary input formatter b. The input formatters can be controlled by the scalar
processor (value=1) or by the ISP (value=0)
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
gpd_gp_reg_reg_gp_switch_gdc1:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
un
used_reg_gp_switc
h
_gdc1
re
g_g
p
_sw
itc
h_gd
c1
Bit
Range
Default &
Access
Description
31:1
0h
RW
unused_reg_gp_switch_gdc1:
Unused
0
0h
RW
reg_gp_switch_gdc1:
Selects the control stream switch for the GDC1. GDC1 can be
controlled by the scalar processor (value=1) or the ISP (value=0)
Type:
Memory Mapped I/O Register
(Size: 32 bits)
gpd_gp_reg_reg_gp_switch_gdc2:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h