Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
1138
Datasheet
15.8.22
reg_gpd_tc_FifoWriteCmd_type (gpd_tc_FifoWriteCmd)—
Offset 100h
Access Method
Default: 00000000h
15.8.23
reg_gpd_c_gpio_reg_gpio_doe_type
(gpd_c_gpio_reg_gpio_doe)—Offset 400h
Access Method
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Fi
fo
W
ri
te
C
m
d
Bit
Range
Default &
Access
Description
31:0
0h
WO
FifoWriteCmd:
Timed controller Command input. A Timed Controller command
consists of 5 32-bit tokens that need to be written sequentially to this register location
Type:
Memory Mapped I/O Register
(Size: 32 bits)
gpd_c_gpio_reg_gpio_doe:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
u
nuse
d
_r
eg
_gpi
o_doe
re
g
_
gpi
o_doe
Bit
Range
Default &
Access
Description
31:12
0h
RW
unused_reg_gpio_doe:
Unused
11:0
0h
RW
reg_gpio_doe:
indicates for each bit whether it is intended to be an input (value='0')
or an output (value='1')